CS 2734
Computer Organization II
Review for Final Exam, Fall 1999
(Wednesday, December 15, 1:30-4:15 pm)
Refer to the reviews for Exam 1 and Exam 2 for the bulk
of the final exam topics.
Here are the new topics since the second exam:
- Pipelined Implementation (Chapter 6)
- Overview (Section 6.1, includes especially discussion of
hazards).
- Pipelined datapath (Section 6.2, ignores hazards).
Note the several ways of graphically representing pipelines
on pages 461-465, especially the series of diagrams
in Figures 6.22-6.24.
- Pipelined control (Section 6.3, Ignores hazards).
The control signals from the Control unit are the same as
for the single-cycle implementation, but the pipelined implementation
makes use of extra latched
register storage between pipeline stages to pass along control
information. (See Figures 6.29 and 6.30. See also the
good series of diagrams in Figures 6.31-6.35.)
- Data hazards and forwarding (Section 6.4).
You should understand how forwarding work, with the Forwarding Unit
and extra control and data lines.
This applies to dependencies between register result of one
instruction and the use of that new register value in subsequent
instructions. (See especially Figure 6.38 and the
series of diagrams in Figures 6.41-6.42. We did not cover
Figure 6.43 or page 488.)
- Data hazards and stalls (Section 6.5).
In case of a dependency involving a lw instruction,
the machine must stall for one instruction. Use of the
Hazard Detection Unit.
Note how the stall is inserted by
de-asserting write lines to the PC and the IF/ID registers,
and by inserting all zeros on control lines. (These zeros
propagate along from cycle to cycle, as the "bubble" of
a stalled instruction moves along the pipeling.)
See diagrams in Figures 6.47-6.49. Note that the
final forwarding is done by the Forwarding Unit as before.
- Branch hazard (Section 6.6). In case of a branch,
if the branch is taken (in one simple implementation),
must stall and wipe out the start of the next instruction.
(Also need to move branch handling into step 2 of pipeline.)
See Figures 6.51 and 6.52. Skip Section 6.6 from pape 501 on.
- Floating point numbers: Especially the bit representation
for a double, as described on pages 275-280, and worked
on in lab 13. (Given the bit representation, what is the number?)
- Coding theory in computer storage and communications:
- Source coding, using data compression.
- Channel coding, using error detection/correction.
This is the area we went into in more detail, including
a brief discussion of the Hamming code to do single-error
correction and double-error detection.
- Secrecy coding, using cryptography.
Likely final exam questions:
- No questions about the use of CMOS transistors to create
gates.
- Probably several questions about MIPS assembly and machine
language. I might ask for the code for a simple loop
(use of beq or bne), or
for a simple call to a function (jal)
and the code for the function (jr $ra to return).
I might ask you to unravel machine code.
- At least one question on either the single-cycle or
multi-cycle implementation. This might even ask you to do
something creative, such a implementing a new instruction.
- Some emphasis on the pipelining chapter, the first six
sections.
- I might ask about the pipelined datapath or pipelined
control (lots of figures in sections 6.2, 6.3).
- I plan to give you a diagram with a forwarding unit,
for you to explain how the forwarding unit works in simple
cases not involving a stall (section 6.4, figures 6.41, 6.42).
- I might ask about the hazard detection unit and stall used
to handle the lw instruction (section 6.5,
figures 6.47, 6.48, 6.49).
- I might ask about handling the beq instruction
by moving everything into step 2, and by putting in a 1-cycle
stall bubble (for successful branch) (section 6.6,
figures 6.51, 6.52).
- At least one question about the format of floating point numbers.
- Perhaps one question about coding theory.
Good Luck!!!
Revision Date: 12/8/99