CS 2734 Computer Organization II

• Overview (Chapter 1)
  • Nothing directly asked about this, just for orientation.
  • Skip Chapter 2.

• Numbers (4.1, 4.2)
  • Conversions between binary, decimal, hexadecimal
  • Integers: 2s complement for negative numbers
  • -13: write 13 in binary, complement, add 1

• MIPS Assembly Language (Chapter 3, 4.4)
  • Format
  • Registers
  • Basic instructions
    • Arithmetic (add, addu, sub, or)
    • Arithmetic immediate (addi, ori)
    • Load/Store (lw, sw) -- uses offset in bytes from an address
    • Load address (pseudo: la, uses lui and ori)
  • Branches
    • bne, beq (offset in words from PC)
    • slt
    • all other branches are pseudo
  • Jumps
    • j, jal (absolute addr in words)
    • jr (jump to address in a register)
  • Coding loops
  • Arrays, and their access
  • Functions and function calls
  • Parameters to functions, returned values
  • Use of the stack: local variables, local (automatic) arrays, values saved
  • Recursion
  • Logical instructions (shifts, and, or, etc.)
  • The assembly process

• MIPS Machine Language (Chapter 3)
  • Basic types
    • R-type, usually 3 registers (arithmetic, logical, slt, jr)
    • I-type (immediate, lw, sw, beq, bne)
    • J-type (j, jal)
  • Hand conversion of machine language into assembly (dis-assembly) [Not emphasized, since this is in Lab 7]
  • Hand conversion of assembly into machine language (assembly) [Not emphasized, since this is in Lab 7]

• Construction of NAND, NOR, NOT, AND, OR gates from CMOS transistors

• Combinational Logic (B.1, B.2, B.3)
  • Truth tables, boolean algebra, logic equations
  • AND, OR and NOT gates
  • Combinational logic
    • Decoders
    • Multiplexors
    • Creating a logic circuit to represent an arbitrary truth table. (Skip PLAs and Don't Cares)

• Design of a ALU (4.5, up to page 241)
  • 1-bit ALU
  • Combining 32 1-bit ALUs to make a 32-bit ALU
  • Handling subtraction (using 2s complement), by complementing bits of second operand and inserting 1 as 0th Carryin bit.
  • Using 3 16-bit ALUs to make 1 32-bit ALU that is nearly twice as fast.

• Memory elements (Section B.5, B-21 to B-25, selected material from B-25 to B-33). You should be able to explain how the following items work.
  • Cross-coupled NOR gates that store an internal value.
  • The D latch, which responds to asserted clock signal.
  • The D flip-flop, which responds to a falling clock signal.
  • Registers, SRAMs, DRAMs.