CS 2733/2731, Org II, Fall 2004, First Exam, Answers
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1. 92 (base 10) = 1011100 (base 2)
-92 (base 10 = ~1011100 + 1 =
1111 1111 1010 0011 + 1 =
1111 1111 1010 0100
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2.
# exam1_2.s
.data
A: .space 40
.text
# insert MIPS instructions here.
.globl main
main: addu $s7, $zero, $ra
########## Start of answer to Question 2 #################
la $s0, A # address of A
addi $t0, $0, 2 # value to store, start at 2
addi $t1, $0, 20 # to terminate loop
Loop: sw $t0, 0($s0) # store current $t0 into A
beq $t0, $t1, End # terminate loop at 20
addi $t0, $t0, 2 # increment counter
addi $s0, $s0, 4 # increment pointer into A
j Loop # jump back to form loop
End:
########## End of answer to Question 2 ###################
## Print the array
la $s0, A # address of A
Loop2: lw $a0, 0($s0)
li $v0, 1
syscall
beq $a0, $t1, End2 # terminate loop at 20
jal Blan
addi $s0, $s0, 4 # increment pointer into A
j Loop2
End2:
jal Newl
########## Finish main###################
addu $ra, $zero, $s7
jr $ra
########## write newline #################################
Newl: li $v0, 4
la $a0, Newline
syscall
jr $ra
########## write blank ###################################
Blan: li $v0, 4
la $a0, Blank
syscall
jr $ra
.data
Newline: .asciiz "\n"
Blank: .asciiz " "
#### output:
# 2 4 6 8 10 12 14 16 18 20
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3.
# exam1_3.s
.data
# stored in A are squares of the first 7 primes
A: .word 4, 9, 25, 49, 121, 169, 289
.text
main: add $s7, $0, $ra # save return address
la $a0, A
li $a1, 7
jal P
move $a0, $v0
li $v0, 1
syscall
add $ra, $0, $s7 # restore return address
jr $ra
# insert MIPS code here for the function P
# Start of answer to Prob 3 ########################
P: addi $sp, $sp, -4
sw $ra, 0($sp)
addi $v0, $0, 0
Loop: lw $t0, 0($a0)
add $v0, $v0, $t0
addi $a1, $a1, -1
addi $a0, $a0, 4
bne $a1, $0, Loop
lw $ra, 0($sp)
addi $sp, $sp, 4
jr $ra
# End of answer to Prob 3 ##########################
# result of a run:
666
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4. (a) Field name: opcode rs rt immediate
Bits: 6 5 5 16
Content: 8 8 16 100
(b) i. addi $v0, $0, 4
ii. addi $v0, $t0, 0
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5. (a) This is a "multiplexor" or a "two-imput multiplexor"
or a "selector".
(b) Suppose A, B, and S are all 1.
The inputs to the upper AND gate are 1 and 0;
its output is 0.
Inputs to lower AND gate are 1 and 1;
its output is 1.
Inputs to OR gate at the right are 0 and 1;
its output is 1.
Thus the output at C is 1.
(c) When S is 1, the multiplexor is selecting the
input from B to be the output at C.